: The paper presents a novel technique for generating effective vectors for delay defects. The test set achieves high path delay fault coverage to capture smalldistributed delay de...
Due to the increased speed in modern designs, testing for delay faults has become an important issue in the postproduction test of manufactured chips. A high fault coverage is nee...
1 The first path implicit and exact non–robust path delay fault grading technique for non–scan sequential circuits is presented. Non enumerative exact coverage is obtained, b...
Test sets for path delay faults in circuits with large numbers of paths are typically generated for path delay faults associated with the longest circuit paths. We show that such ...
In this paper we propose a test compaction method for path delay faults in a logic circuit. The method generates a compact set of two-pattern tests for faults on long paths select...