60 search results - page 3 / 12 » An Efficient Path Delay Fault Coverage Estimator |
ICCAD
2006
IEEE
15 years 6 months ago
2006
IEEE
It has been shown that the delay of a target path can be composed linearly of other path delays. If the later paths are robustly testable (with known delay values), the target pat...
GLVLSI
2002
IEEE
15 years 2 months ago
2002
IEEE
This paper develops new techniques for detecting both stuck-open faults and resistive open faults, which result in increased delays along some paths. The improved detection of CMO...
VTS
2000
IEEE
15 years 2 months ago
2000
IEEE
1 This paper addresses the problem of testing path delay faults in a microprocessor using instructions. It is observed that a structurally testable path (i.e., a path testable thro...
DAC
1994
ACM
15 years 1 months ago
1994
ACM
A low overhead DFT technique, called clock-grouping, for delay testing of sequential synchronous circuits is presented. The proposed technique increases robust path delay fault co...
ASPDAC
2006
ACM
15 years 3 months ago
2006
ACM
This paper presents a case-study of delay defect screening applied to Fujitsu 2.16GHz SPARC64 microprocessor. A nonrobust delay test is used while each test vector is compacted to...