60 search results - page 4 / 12 » An Efficient Path Delay Fault Coverage Estimator |
ASPDAC
2004
ACM
15 years 3 months ago
2004
ACM
- Under manufacturing process variation, a path through a fault site is called longest for delay test if there exists a process condition under which the path has the maximum delay...
VLSID
1995
IEEE
15 years 1 months ago
1995
IEEE
ATS
2005
IEEE
15 years 3 months ago
2005
IEEE
The need for high-performance pipelined architectures has resulted in the adoption of latch based designs with multiple, interacting clocks. For such designs, time sharing across ...
IOLTS
2000
IEEE
15 years 2 months ago
2000
IEEE
The combination of higher quality requirements and sensitivity of high performance circuits to delay defects has led to an increasing emphasis on delay testing of VLSI circuits. A...
INFOCOM
2010
IEEE
14 years 7 months ago
2010
IEEE
Many measurement systems have been proposed in recent years to shed light on the internal performance of the Internet. Their common goal is to allow distributed applications to imp...