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PERCOM
2011
ACM
14 years 3 months ago
Using prediction to conserve energy in recognition on mobile devices
—As devices are expected to be aware of their environment, the challenge becomes how to accommodate these abilities with the power constraints which plague modern mobile devices....
Dawud Gordon, Stephan Sigg, Yong Ding, Michael Bei...
DAC
2009
ACM
16 years 21 days ago
A DVS-based pipelined reconfigurable instruction memory
Energy consumption is of significant concern in battery operated embedded systems. In the processors of such systems, the instruction cache consumes a significant fraction of the ...
Zhiguo Ge, Tulika Mitra, Weng-Fai Wong
DAC
2006
ACM
15 years 1 months ago
A fast HW/SW FPGA-based thermal emulation framework for multi-processor system-on-chip
With the growing complexity in consumer embedded products and the improvements in process technology, Multi-Processor SystemOn-Chip (MPSoC) architectures have become widespread. T...
David Atienza, Pablo Garcia Del Valle, Giacomo Pac...
IPCCC
2006
IEEE
15 years 5 months ago
OS-aware tuning: improving instruction cache energy efficiency on system workloads
Low power has been considered as an important issue in instruction cache (I-cache) designs. Several studies have shown that the I-cache can be tuned to reduce power. These techniq...
Tao Li, Lizy K. John
LCTRTS
2010
Springer
15 years 6 months ago
Versatile system-level memory-aware platform description approach for embedded MPSoCs
In this paper, we present a novel system modeling language which targets primarily the development of source-level multiprocessor memory aware optimizations. In contrast to previo...
Robert Pyka, Felipe Klein, Peter Marwedel, Stylian...