Sciweavers

1416 search results - page 144 / 284
» An Exact Interpretation of While
Sort
View
SWAT
2004
Springer
171views Algorithms» more  SWAT 2004»
15 years 6 months ago
Connectivity of Graphs Under Edge Flips
We study the following problem: Given a set V of n vertices and a set E of m edge pairs, we define a graph family G(V, E) as the set of graphs that have vertex set V and contain ...
Norbert Zeh
SPAA
2003
ACM
15 years 6 months ago
Cycle stealing under immediate dispatch task assignment
We consider the practical problem of task assignment in a server farm, where each arriving job is immediately dispatched to a server in the farm. We look at the benefit of cycle ...
Mor Harchol-Balter, Cuihong Li, Takayuki Osogami, ...
CC
2003
Springer
15 years 6 months ago
Early Control of Register Pressure for Software Pipelined Loops
Abstract. The register allocation in loops is generally performed after or during the software pipelining process. This is because doing a conventional register allocation at firs...
Sid Ahmed Ali Touati, Christine Eisenbeis
CLEF
2003
Springer
15 years 6 months ago
The Multiple Language Question Answering Track at CLEF 2003
This paper reports on the pilot question answering track that was carried out within the CLEF initiative this year. The track was divided into monolingual and bilingual tasks: mono...
Bernardo Magnini, Simone Romagnoli, Alessandro Val...
83
Voted
DATE
2002
IEEE
79views Hardware» more  DATE 2002»
15 years 5 months ago
Formulation of Low-Order Dominant Poles for Y-Matrix of Interconnects
This paper presents an efficient approach to compute the dominant poles for the reduced-order admittance (Y parameter) matrix of lossy interconnects. Using the global approximati...
Qinwei Xu, Pinaki Mazumder