644 search results - page 24 / 129 » An Experimental Chip to Evaluate Test Techniques: Experiment... |
DATE
2009
IEEE
15 years 6 months ago
2009
IEEE
Abstract—Chip multiprocessors (CMPs) present a unique scenario for software data prefetching with subtle tradeoffs between memory bandwidth and performance. In a shared L2 based ...
IMAGING
2004
15 years 1 months ago
2004
Eight high-dynamic-range image rendering algorithms were tested using ten high-dynamic-range pictorial images. A large-scale paired comparison psychophysical experiment was develo...
125
click to vote
FLAIRS
2000
15 years 1 months ago
2000
This paper discusses the empirical evaluation of improving generalization performance of neural networks by systematic treatment of training and test failures. As a result of syst...
BMCBI
2007
14 years 12 months ago
2007
Background: Chromatin immunoprecipitation on tiling arrays (ChIP-chip) has been widely used to investigate the DNA binding sites for a variety of proteins on a genome-wide scale. ...
SBCCI
2005
ACM
15 years 5 months ago
2005
ACM
The designer of a system on a chip (SoC) that connects IP cores through a network on chip (NoC) needs methods to support application performance evaluation. Two key aspects these ...