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ISHPC
2003
Springer
15 years 11 months ago
Code and Data Transformations for Improving Shared Cache Performance on SMT Processors
Simultaneous multithreaded processors use shared on-chip caches, which yield better cost-performance ratios. Sharing a cache between simultaneously executing threads causes excessi...
Dimitrios S. Nikolopoulos
DAC
1994
ACM
15 years 9 months ago
Routing in a New 2-Dimensional FPGA/FPIC Routing Architecture
- This paper studies the routing problem for a new Field-Programmable Gate Array (FPGA) and Field-Programmable Interconnect Chip (FPIC) routing architecture which improves upon the...
Yachyang Sun, C. L. Liu
CCGRID
2001
IEEE
15 years 9 months ago
xBSP: An Efficient BSP Implementation for clan
Virtual Interface Architecture(VIA) is a light-weight protocol for protected user-level zero-copy communication. In spite of high performance of VIA, the previous MPI implementati...
Yang-Suk Kee, Soonhoi Ha
DSN
2000
IEEE
15 years 9 months ago
On the Emulation of Software Faults by Software Fault Injection
This paper presents an experimental study on the emulation of software faults by fault injection. In a first experiment, a set of real software faults has been compared with fault...
Henrique Madeira, Diamantino Costa, Marco Vieira
JCB
2002
111views more  JCB 2002»
15 years 5 months ago
A General Edit Distance between RNA Structures
Arc-annotated sequences are useful in representing the structural information of RNA sequences. In general, RNA secondary and tertiary structures can be represented as a set of ne...
Tao Jiang, Guohui Lin, Bin Ma, Kaizhong Zhang