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DATE
2010
IEEE
15 years 5 months ago
2010
IEEE
— This paper describes a Model Order Reduction algorithm for multi-dimensional parameterized systems, based on a sampling procedure which incorporates a low order moment matching...
IEEEPACT
2009
IEEE
15 years 6 months ago
2009
IEEE
Abstract—Load elimination is a classical compiler transformation that is increasing in importance for multi-core and many-core architectures. The effect of the transformation is ...
CGI
2003
IEEE
15 years 5 months ago
2003
IEEE
In contrast to the extensively researched modeling of plant architecture, the modeling of plant organs largely remains an open problem. In this paper, we propose a method for mode...
ASPLOS
2010
ACM
15 years 6 months ago
2010
ACM
As the number of devices available per chip continues to increase, the computational potential of future computer architectures grows likewise. While this is a clear benefit for f...
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HPCA
2009
IEEE
16 years 13 days ago
2009
IEEE
The shrinking processor feature size, lower threshold voltage and increasing clock frequency make modern processors highly vulnerable to transient faults. Architectural Vulnerabil...