132 views101 votes15 years 6 months ago CASES 2003»
The Single Instruction Multiple Data (SIMD) model for fine-grained parallelism was recently extended to support SIMD operations on disjoint vector elements. In this paper we demon...
119 views125 votes15 years 1 months ago TECS 2008»
straction SUDEEP PASRICHA and NIKIL DUTT University of California, Irvine and MOHAMED BEN-ROMDHANE Newport Media Inc. Currently, system-on-chip (SoC) designs are becoming increasin...
163 views126 votes15 years 6 months ago SPAA 2003»
Quantum computation has become an intriguing technology with which to attack difficult problems and to enhance system security. Quantum algorithms, however, have been analyzed un...
107 views120 votes15 years 8 months ago EDOC 2008»
Enterprise Architecture is a model-based approach to business-oriented IT management. To promote good IT decision making, an Enterprise Architecture framework needs to explicate w...
Novel test bench techniques are required to cope with a functional test complexity which is predicted to grow much more strongly than design complexity. Our test bench approach at...
147 views202 votes16 years 1 months ago POPL 2007»
We describe the design and current status of our effort to implement the programming model of nested data parallelism into the Glasgow Haskell Compiler. We extended the original p...
Contemporary embedded systems quite often employ extremely complicated software consisting of a number of interrelated components, and this has made object-oriented design methodo...
127 views116 votes15 years 5 months ago LCPC 1995»
Heterogeneous parallel systems incorporate diverse models of parallelism within a single machine or across machines and are better suited for diverse applications 25, 43, 30]. Thes...
Aim of this paper is to propose a methodology for the definition of an instruction-level energy estimation framework for VLIW (Very Long Instruction Word) processors. The power mo...
Multiple instruction issue processors place high demands on register file bandwidth. One solution to reduce this bottleneck is the use of multiple register files. Register allocat...