260 search results - page 7 / 52 » An FPGA Implemented Processor Architecture with Adaptive Res... |
FPL
2009
Springer
15 years 2 months ago
2009
Springer
Automated code generation and performance tuning techniques for concurrent architectures such as GPUs, Cell and FPGAs can provide integer factor speedups over multi-core processor...
ISVLSI
2006
IEEE
15 years 3 months ago
2006
IEEE
FPGAs have been used for prototyping of ASICs, for low-volume ASIC replacement and for systems requiring in-field hardware upgrades. However, the potential to use dynamic reconfig...
VLSISP
2010
14 years 7 months ago
2010
— This paper presents ALA (Adaptable Logarithm Approximation), a novel hardware architecture for the approximation of the base-2 logarithm of integers at an arbitrary accuracy, s...
81
Voted
IPPS
2006
IEEE
15 years 3 months ago
2006
IEEE
This paper presents the hardware architecture of DynaCORE, a dynamically reconfigurable system-on-chip for network applications. DynaCORE is an application specific coprocessor ...
86
Voted
FPL
2005
Springer
15 years 3 months ago
2005
Springer
Abstract. We propose CUSTARD — CUStomisable Threaded ARchitecture — a soft processor design space that combines support for multiple hardware threads and automatically generate...