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» An IEEE 1149.1 Based Logic Signature Analyzer in a Chip
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ITC
1991
IEEE
97views Hardware» more  ITC 1991»
15 years 2 months ago
An IEEE 1149.1 Based Logic/Signature Analyzer in a Chip
Lee Whetsel
INFOCOM
2007
IEEE
15 years 4 months ago
TriBiCa: Trie Bitmap Content Analyzer for High-Speed Network Intrusion Detection
Abstract—Deep packet inspection (DPI) is often used in network intrusion detection and prevention systems (NIDPS), where incoming packet payloads are compared against known attac...
N. Sertac Artan, H. Jonathan Chao
ICCAD
2010
IEEE
148views Hardware» more  ICCAD 2010»
14 years 8 months ago
Trace signal selection to enhance timing and logic visibility in post-silicon validation
Trace buffer technology allows tracking the values of a few number of state elements inside a chip within a desired time window, which is used to analyze logic errors during post-s...
Hamid Shojaei, Azadeh Davoodi
TVLSI
2008
164views more  TVLSI 2008»
14 years 10 months ago
Dynamically Configurable Bus Topologies for High-Performance On-Chip Communication
The on-chip communication architecture is a major determinant of overall performance in complex System-on-Chip (SoC) designs. Since the communication requirements of SoC components...
Krishna Sekar, Kanishka Lahiri, Anand Raghunathan,...
MICRO
2006
IEEE
74views Hardware» more  MICRO 2006»
15 years 4 months ago
Phoenix: Detecting and Recovering from Permanent Processor Design Bugs with Programmable Hardware
Although processor design verification consumes ever-increasing resources, many design defects still slip into production silicon. In a few cases, such bugs have caused expensive...
Smruti R. Sarangi, Abhishek Tiwari, Josep Torrella...