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CORR
2011
Springer
181views Education» more  CORR 2011»
14 years 1 months ago
Garbage Collection for Multicore NUMA Machines
Modern high-end machines feature multiple processor packages, each of which contains multiple independent cores and integrated memory controllers connected directly to dedicated p...
Sven Auhagen, Lars Bergstrom, Matthew Fluet, John ...
IEEEPACT
2006
IEEE
15 years 3 months ago
Branch predictor guided instruction decoding
Fast instruction decoding is a challenge for the design of CISC microprocessors. A well-known solution to overcome this problem is using a trace cache. It stores and fetches alrea...
Oliverio J. Santana, Ayose Falcón, Alex Ram...
HPCA
2002
IEEE
15 years 2 months ago
Non-Vital Loads
As the frequency gap between main memory and modern microprocessor grows, the implementation and efficiency of on-chip caches become more important. The growing latency to memory ...
Ryan Rakvic, Bryan Black, Deepak Limaye, John Paul...
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HCW
2000
IEEE
15 years 1 months ago
Evaluation of PAMS' Adaptive Management Services
Management of large-scale parallel and distributed applications is an extremely complex task due to factors such as centralized management architectures, lack of coordination and ...
Yoonhee Kim, Salim Hariri, Muhamad Djunaedi
ISORC
2000
IEEE
15 years 1 months ago
Establishing a Data-Mining Environment for Wartime Event Prediction with an Object-Oriented Command and Control Database
This paper documents progress to date on a research project, the goal of which is wartime event prediction. The paper describes the operational concept, the datamining environment...
Marion G. Ceruti, S. Joe McCarthy