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» An Improved Parallel Thinning Algorithm
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ICASSP
2008
IEEE
15 years 4 months ago
Address assignment sensitive variable partitioning and scheduling for DSPS with multiple memory banks
Multiple memory banks design is employed in many high performance DSP processors. This architectural feature supports higher memory bandwidth by allowing multiple data memory acce...
Chun Jason Xue, Tiantian Liu, Zili Shao, Jingtong ...
DATE
2006
IEEE
88views Hardware» more  DATE 2006»
15 years 3 months ago
Temporal partitioning for image processing based on time-space complexity in reconfigurable architectures
Temporal partitioning techniques are useful to implement large and complex applications, which can be split into partitions in FPGA devices. In order to minimize resources, each o...
Paulo Sérgio B. do Nascimento, Manoel Euseb...
PDCAT
2004
Springer
15 years 3 months ago
GridCrypt: High Performance Symmetric Key Cryptography Using Enterprise Grids
Today’s cryptanalysis on symmetric key cryptography is encouraging the use of larger key sizes and complex algorithms to achieve an unbreakable state. However, this leads an inc...
Agus Setiawan, David Adiutama, Julius Liman, Aksha...
IPPS
2003
IEEE
15 years 3 months ago
Optimizing Synchronization Operations for Remote Memory Communication Systems
Synchronization operations, such as fence and locking, are used in many parallel operations accessing shared memory. However, a process which is blocked waiting for a fence operat...
Darius Buntinas, Amina Saify, Dhabaleswar K. Panda...
IPPS
2003
IEEE
15 years 3 months ago
Agent-Based Grid Load Balancing Using Performance-Driven Task Scheduling
Load balancing is a key concern when developing parallel and distributed computing applications. The emergence of computational grids extends this problem, where issues of cross-d...
Junwei Cao, Daniel P. Spooner, Stephen A. Jarvis, ...