181 search results - page 21 / 37 » An Information Flow Tool for Gypsy |
91
Voted
FMICS
2006
Springer
15 years 3 months ago
2006
Springer
Abstract. The design flow of systems-on-a-chip (SoCs) identifies several abstraction levels higher than the Register-Transfer-Level that constitutes the input of the synthesis tool...
93
Voted
DAC
1997
ACM
15 years 4 months ago
1997
ACM
A number of industry trends are shaping the requirements for IC and electronic equipment design. The density and complexity of circuit technologies have increased to a point where...
VL
2009
IEEE
15 years 7 months ago
2009
IEEE
Designers’ extensive software needs have not been adequately documented in the research literature, and are poorly supported by software. Without appropriate tools to support th...
DATE
2007
IEEE
15 years 6 months ago
2007
IEEE
This paper proposes an innovative methodology to perform and validate a Failure Mode and Effects Analysis (FMEA) at System-on-Chip (SoC) level. This is done in compliance with the...
ICWE
2003
Springer
15 years 5 months ago
2003
Springer
The applications described here follow up the works performed in the recent last years by the Data Structures and Computational Linguistics Group at Las Palmas de Gran Canaria Univ...