347 search results - page 32 / 70 » An Input Output HMM Architecture |
55
Voted
ASPDAC
1998
ACM
15 years 4 months ago
1998
ACM
—An AND-OR-EXOR network, where the output EXOR gate has only two inputs, is one of the simplest three-level architecture. This network realizes an EXOR of two sum-of-products exp...
110
Voted
CASES
2005
ACM
15 years 1 months ago
2005
ACM
In this work, we propose and investigate the idea of enhancing a System-on-Chip (SoC) communication architecture (the fabric that integrates system components and carries the comm...
ISCA
2008
IEEE
14 years 11 months ago
2008
IEEE
Network-on-Chip (NoC) architectures have been adopted by a growing number of multi-core designs as a flexible and scalable solution to the increasing wire delay constraints in the...
ISCA
2007
IEEE
15 years 6 months ago
2007
IEEE
We introduce a novel chip fabrication technique called “brick and mortar”, in which chips are made from small, pre-fabricated ASIC bricks and bonded in a designer-specified a...
108
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DAC
2011
ACM
13 years 11 months ago
2011
ACM
As transistor dimensions continue to scale deep into the nanometer regime, silicon reliability is becoming a chief concern. At the same time, transistor counts are scaling up, ena...