347 search results - page 38 / 70 » An Input Output HMM Architecture |
119
click to vote
CN
2006
14 years 11 months ago
2006
As buffer-less crossbar scheduling algorithms reach their practical limitations due to higher port numbers and data rates, internally buffered crossbar (IBC) switches have gained ...
131
Voted
CORR
2010
Springer
14 years 8 months ago
2010
Springer
Power management is one of the vital issue in wireless sensor networks, where the lifetime of the network relies on battery powered nodes. Transmitting at high power reduces the l...
107
click to vote
ISCAS
1994
IEEE
15 years 3 months ago
1994
IEEE
This paper presents a novel VLSI architecture for high-speed data compressor designs which implement the well-known LZ77 algorithm. The architecture mainly consists of three units...
TVLSI
2008
14 years 11 months ago
2008
ion levels. The framework also supports the generation of test constraints, which can be satisfied using a constraint solver to generate tests. A compositional verification approac...
153
click to vote
ARVLSI
1995
IEEE
15 years 3 months ago
1995
IEEE
Precomputation is a recently proposed logic optimization technique which selectively disables the inputs of a sequential logic circuit, thereby reducing switching activity and pow...