347 search results - page 39 / 70 » An Input Output HMM Architecture |
VLSID
2002
IEEE
16 years 4 days ago
2002
IEEE
External pins for test are precious hardware resources because this number is strongly restricted. Cores are tested via test access mechanisms (TAMs) such as a test bus architectu...
FSE
1994
Springer
15 years 3 months ago
1994
Springer
This paper shows that the actual proposal for an unbalanced Feistel network by Schneier and Blaze is as vulnerable to differential cryptanalysis as the DES. 1 McGuffin Schneier and...
CDES
2006
15 years 1 months ago
2006
Multi-valued Fredkin gates (MVFG) are reversible gates and they can be considered as modified version of the better known reversible gate the Fredkin gate. Reversible logic gates ...
TVLSI
2008
14 years 11 months ago
2008
Abstract--The quantum-dot cellular automata (QCA) model offers a novel nano-domain computing architecture by mapping the intended logic onto the lowest energy configuration of a co...
ARVLSI
1997
IEEE
15 years 4 months ago
1997
IEEE
This paper describes the architecture and implementation of a high-speed decompression engine for embedded processors. The engine is targeted to processors where embedded programs...