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VLSID
2007
IEEE
126views VLSI» more  VLSID 2007»
15 years 11 months ago
An ECO Technique for Removing Crosstalk Violations in Clock Networks
Crosstalk noise in the clock network of digital circuits is often detected late in the design cycle, sometimes as late as after first silicon. It is therefore necessary to fix cros...
Amit Kumar, Krishnendu Chakrabarty, Chunduri Rama ...
CASES
2006
ACM
15 years 5 months ago
Integrated scratchpad memory optimization and task scheduling for MPSoC architectures
Multiprocessor system-on-chip (MPSoC) is an integrated circuit containing multiple instruction-set processors on a single chip that implements most of the functionality of a compl...
Vivy Suhendra, Chandrashekar Raghavan, Tulika Mitr...
DSN
2005
IEEE
15 years 4 months ago
On Partial Protection in Groomed Optical WDM Mesh Networks
In this paper, we consider the problem of survivable network design in traffic groomed optical WDM mesh networks with sub-wavelength capacity connections. In typical survivable n...
Jing Fang, Mahesh Sivakumar, Arun K. Somani, Krish...
GLVLSI
2003
IEEE
119views VLSI» more  GLVLSI 2003»
15 years 4 months ago
Simultaneous peak and average power minimization during datapath scheduling for DSP processors
The use of multiple supply voltages for energy and average power reduction is well researched and several works have appeared in the literature. However, in low power design using...
Saraju P. Mohanty, N. Ranganathan, Sunil K. Chappi...
ASAP
2003
IEEE
133views Hardware» more  ASAP 2003»
15 years 4 months ago
Storage Management in Process Networks using the Lexicographically Maximal Preimage
At the Leiden Embedded Research Center, we are developing a compiler called Compaan that automatically translates signal processing applications written in Matlab into Kahn Proces...
Alexandru Turjan, Bart Kienhuis