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IPPS
2003
IEEE
15 years 2 months ago
Loop Dissevering: A Technique for Temporally Partitioning Loops in Dynamically Reconfigurable Computing Platforms
This paper presents a technique, called loop dissevering, to temporally partitioning any type of loop presented in programming languages. The technique can be used in the presence...
João M. P. Cardoso
SC
1992
ACM
15 years 1 months ago
Compiler Code Transformations for Superscalar-Based High Performance Systems
Exploiting parallelism at both the multiprocessor level and the instruction level is an e ective means for supercomputers to achieve high-performance. The amount of instruction-le...
Scott A. Mahlke, William Y. Chen, John C. Gyllenha...
74
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ICPP
1996
IEEE
15 years 1 months ago
Restructuring Programs for High-Speed Computers with Polaris
The ability to automatically parallelize standard programming languages results in program portability across a wide range of machine architectures. It is the goal of the Polaris ...
William Blume, Rudolf Eigenmann, Keith Faigin, Joh...
ICS
1995
Tsinghua U.
15 years 1 months ago
Idiom Recognition in the Polaris Parallelizing Compiler
The elimination of induction variables and the parallelization of reductions in FORTRAN programs have been shown to be integral to performance improvement on parallel computers 7,...
William M. Pottenger, Rudolf Eigenmann
LCPC
1997
Springer
15 years 1 months ago
Reducing Synchronization Overhead for Compiler-Parallelized Codes
Software distributed-shared-memory (DSM) systems providean appealingtarget for parallelizing compilers due to their flexibility. Previous studies demonstrate such systems can prov...
Hwansoo Han, Chau-Wen Tseng, Peter J. Keleher