421 search results - page 27 / 85 » An Intelligent Parallel Loop Scheduling for Parallelizing Co... |
EUROPAR
1997
Springer
15 years 1 months ago
1997
Springer
Abstract. We present a relational algebra based framework for compiling e cient sparse matrix code from dense DO-ANY loops and a speci cation of the representation of the sparse ma...
143
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MICRO
2000
IEEE
14 years 9 months ago
2000
IEEE
level of abstraction, compared with the program representation for scalar optimizations. For example, loop unrolling and loop unrolland-jam transformations exploit the large regist...
ICMCS
2007
IEEE
15 years 3 months ago
2007
IEEE
The H.264 decoder has a sequential, control intensive front end that makes it difficult to leverage the potential performance of emerging manycore processors. Preparsing is a fun...
HPCA
2004
IEEE
15 years 10 months ago
2004
IEEE
This paper focuses on generating efficient software pipelined schedules for in-order machines, which we call Converged Trace Schedules. For a candidate loop, we form a string of t...
115
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IPPS
2005
IEEE
15 years 3 months ago
2005
IEEE
Hyperthreaded (HT) and simultaneous multithreaded (SMT) processors are now available in commodity workstations and servers. This technology is designed to increase throughput by e...