421 search results - page 42 / 85 » An Intelligent Parallel Loop Scheduling for Parallelizing Co... |
PPAM
2005
Springer
15 years 3 months ago
2005
Springer
The main objective of the Intelligent GRID Scheduling System (ISS) project is to provide a middleware infrastructure allowing a good positioning and scheduling of real life applic...
CONPAR
1994
15 years 1 months ago
1994
The rapid advances in high-performancecomputer architectureand compilationtechniques provide both challenges and opportunitiesto exploitthe rich solution space of software pipeline...
IPPS
1997
IEEE
15 years 1 months ago
1997
IEEE
Several methods have been proposed in the literature for the distribution of data on distributed memory machines, either oriented to dense or sparse structures. Many of the real a...
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TCAD
2008
14 years 9 months ago
2008
Abstract--Multimedia and DSP applications have several computationally intensive kernels which are often offloaded and accelerated by application-specific hardware. This paper pres...
MICRO
2000
IEEE
14 years 9 months ago
2000
IEEE
High-performance microprocessors are currently designed to exploit the inherent instruction level parallelism (ILP) available in most applications. The techniques used in their de...