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DSD
2010
IEEE
162views Hardware» more  DSD 2010»
14 years 8 months ago
A Parallel for Loop Memory Template for a High Level Synthesis Compiler
—We propose a parametrized memory template for applications with parallel for loops. The template’s parameters reflect important trade-offs made during system design. The temp...
Craig Moore, Wim Meeus, Harald Devos, Dirk Strooba...
TC
1998
14 years 9 months ago
An Efficient Solution to the Cache Thrashing Problem Caused by True Data Sharing
—When parallel programs are executed on multiprocessors with private caches, a set of data may be repeatedly used and modified by different threads. Such data sharing can often r...
Guohua Jin, Zhiyuan Li, Fujie Chen
SPAA
2010
ACM
14 years 9 months ago
Buffer-space efficient and deadlock-free scheduling of stream applications on multi-core architectures
We present a scheduling algorithm of stream programs for multi-core architectures called team scheduling. Compared to previous multi-core stream scheduling algorithms, team schedu...
JongSoo Park, William J. Dally
EUROPAR
2006
Springer
15 years 1 months ago
Multi-dimensional Kernel Generation for Loop Nest Software Pipelining
Single-dimension Software Pipelining (SSP) has been proposed as an effective software pipelining technique for multi-dimensional loops [16]. This paper introduces for the first tim...
Alban Douillet, Hongbo Rong, Guang R. Gao
IEEEPACT
1997
IEEE
15 years 1 months ago
A Parallel Algorithm for Compile-Time Scheduling of Parallel Programs on Multiprocessors
† In this paper, we propose a parallel randomized algorithm, called Parallel Fast Assignment using Search Technique (PFAST), for scheduling parallel programs represented by direc...
Yu-Kwong Kwok, Ishfaq Ahmad