421 search results - page 53 / 85 » An Intelligent Parallel Loop Scheduling for Parallelizing Co... |
MICRO
1996
IEEE
15 years 1 months ago
1996
IEEE
A machine description facility allows compiler writers to specify machine execution constraints to the optimization and scheduling phases of an instruction-level parallelism (ILP)...
95
Voted
MICRO
2006
IEEE
15 years 3 months ago
2006
IEEE
The superblock is a scheduling region which exposes instruction level parallelism beyond the basic block through speculative execution of instructions. In general, scheduling supe...
113
click to vote
IEEEPACT
2002
IEEE
15 years 2 months ago
2002
IEEE
Many modern embedded processors (esp. DSPs) support partitioned memory banks (also called X-Y memory or dual bank memory) along with parallel load/store instructions to achieve co...
77
Voted
ICPPW
2009
IEEE
15 years 4 months ago
2009
IEEE
—In this paper, we investigate the differences and tradeoffs imposed by two parallel Haskell dialects running on multicore machines. GpH and Eden are both constructed using the h...
ESCIENCE
2005
IEEE
15 years 3 months ago
2005
IEEE
GridXSLT is an implementation of the XSLT programming language designed for distributed web service orchestration. Based on the functional semantics of the language, it compiles p...