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IEEEPACT
1999
IEEE
15 years 1 months ago
1999
IEEE
Trace cache, an instruction fetch technique that reduces taken branch penalties by storing and fetching program instructions in dynamic execution order, dramatically improves inst...
CASES
2009
ACM
15 years 4 months ago
2009
ACM
Coarse-grained reconfigurable architectures (CGRAs) present an appealing hardware platform by providing programmability with the potential for high computation throughput, scalab...
PPOPP
1995
ACM
15 years 1 months ago
1995
ACM
Low-overhead message passing is critical to the performance of many applications. Active Messages[27] reduce the software overhead for message handling: messages are run as handle...
93
Voted
MICRO
1996
IEEE
15 years 1 months ago
1996
IEEE
Modern microprocessors offer more instruction-level parallelism than most programs and compilers can currently exploit. The resulting disparity between a machine's peak and a...
APLAS
2005
ACM
15 years 3 months ago
2005
ACM
This paper presents a novel method to construct a dynamic single assignment (DSA) form of array-intensive, pointer-free C programs (or in any other procedural language). A program ...