421 search results - page 67 / 85 » An Intelligent Parallel Loop Scheduling for Parallelizing Co... |
79
Voted
CEC
2010
IEEE
14 years 10 months ago
2010
IEEE
Rather than attempting to evolve a complete program from scratch we demonstrate genetic interface programming (GIP) by automatically generating a parallel CUDA kernel with identica...
ICCS
2009
Springer
15 years 4 months ago
2009
Springer
The development of optimized codes is time-consuming and requires extensive architecture, compiler, and language expertise, therefore, computational scientists are often forced to ...
73
Voted
ICS
2005
Tsinghua U.
15 years 3 months ago
2005
Tsinghua U.
A key step in program optimization is the determination of optimal values for code optimization parameters such as cache tile sizes and loop unrolling factors. One approach, which...
104
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HIPC
2005
Springer
15 years 3 months ago
2005
Springer
Abstract. Linear scan register allocation is an attractive register allocation algorithm because of its simplicity and fast running time. However, it is generally felt that linear ...
APCSAC
2000
IEEE
15 years 2 months ago
2000
IEEE
This paper briefly reviews the current research into RISC microprocessor architecture, which now seems to be so complex as to make the acronym somewhat of an oxymoron. In response...