421 search results - page 84 / 85 » An Intelligent Parallel Loop Scheduling for Parallelizing Co... |
HPCS
2006
IEEE
15 years 3 months ago
2006
IEEE
This paper presents the initial design of the Cyclops-64 (C64) system software infrastructure and tools under development as a joint effort between IBM T.J. Watson Research Center...
DATE
2005
IEEE
15 years 3 months ago
2005
IEEE
With new sophisticated compiler technology, it is possible to schedule distant instructions efficiently. As a consequence, the amount of exploitable instruction level parallelism...
TCAD
2002
14 years 9 months ago
2002
In this paper, an instruction-level energy model is proposed for the data-path of very long instruction word (VLIW) pipelined processors that can be used to provide accurate power ...
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MICRO
2010
IEEE
14 years 8 months ago
2010
IEEE
SARC merges cache controller and network interface functions by relying on a single hardware primitive: each access checks the tag and the state of the addressed line for possible...
MIDDLEWARE
2007
Springer
15 years 3 months ago
2007
Springer
Many wireless sensor network protocols are employing gossipbased message dissemination, where nodes probabilistically forward messages, to reduce message overhead. We are concerne...