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NPC
2005
Springer
15 years 3 months ago
A Performance-Based Parallel Loop Self-scheduling on Grid Computing Environments
Efficient loop scheduling on parallel and distributed systems depends mostly on load balancing, especially on heterogeneous PC-based cluster and grid computing environments. In thi...
Wen-Chung Shih, Chao-Tung Yang, Shian-Shyong Tseng
IEEEPACT
2007
IEEE
15 years 3 months ago
Performance Portable Optimizations for Loops Containing Communication Operations
Effective use of communication networks is critical to the performance and scalability of parallel applications. Partitioned Global Address Space languages like UPC bring the pro...
Costin Iancu, Wei Chen, Katherine A. Yelick
PDPTA
2007
14 years 11 months ago
Suppressing Independent Loops in Packing/Unpacking Loop Nest to Reduce Message Size for Message-passing Code
- In this paper we experiment with two optimization techniques we are considering implementing in a parallelizing compiler that generates parallel code for a distributed-memory sys...
P. Jerry Martin, Clayton S. Ferner
LCPC
1998
Springer
15 years 1 months ago
Copy Elimination for Parallelizing Compilers
Techniques for aggressive optimization and parallelization of applications can have the side-effect of introducing copy instructions, register-to-register move instructions, into t...
David J. Kolson, Alexandru Nicolau, Nikil D. Dutt
IPPS
2010
IEEE
14 years 7 months ago
DynTile: Parametric tiled loop generation for parallel execution on multicore processors
Abstract--Loop tiling is an important compiler transformation used for enhancing data locality and exploiting coarsegrained parallelism. Tiled codes in which tile sizes are runtime...
Albert Hartono, Muthu Manikandan Baskaran, J. Rama...