177 search results - page 4 / 36 » An Interconnect Energy Model Considering Coupling Effects |
VLSI
2007
Springer
15 years 3 months ago
2007
Springer
Abstract—Analysis and verification environments for nextgeneration nano-scale RFIC designs must be able to cope with increasing design complexity and to account for new effects,...
GLVLSI
2003
IEEE
15 years 2 months ago
2003
IEEE
—Interconnect inductance introduces a shielding effect which decreases the effective capacitance seen by the driver of a circuit, reducing the gate delay. A model of the effectiv...
ICCAD
2001
IEEE
15 years 6 months ago
2001
IEEE
This paper presents both compact analytical models and fast SPICE based 3-D electro-thermal simulation methodology to characterize thermal effects due to Joule heating in high per...
ICCAD
2008
IEEE
15 years 6 months ago
2008
IEEE
— As Double Patterning Technology (DPT) becomes the only solution for 32-nm lithography process, we need to investigate how DPT affects the performance of a chip. In this paper, ...
ISQED
2006
IEEE
15 years 3 months ago
2006
IEEE
It is well known that fill insertion adversely affects total and coupling capacitance of interconnects. While grounded fill can be extracted by full-chip extractors, floating ...