177 search results - page 9 / 36 » An Interconnect Energy Model Considering Coupling Effects |
ICCD
2002
IEEE
15 years 6 months ago
2002
IEEE
Power is considered to be the major limiter to the design of more faster and complex processors in the near future. In order to address this challenge, a combination of process, c...
69
Voted
DATE
2005
IEEE
15 years 3 months ago
2005
IEEE
Complex applications implemented as Systems on Chip (SoCs) demand extensive use of system level modeling and validation. Their implementation gathers a large number of complex IP ...
DATE
2005
IEEE
15 years 3 months ago
2005
IEEE
As packet-switching interconnection networks replace buses and dedicated wires to become the standard on-chip interconnection fabric, reducing their power consumption has been ide...
VTS
2002
IEEE
15 years 2 months ago
2002
IEEE
In this paper, we present a test pattern generation algorithm aiming at signal integrity faults on long interconnects. This is achieved by considering the effect of inputs and par...
ICASSP
2011
IEEE
14 years 1 months ago
2011
IEEE
Direction of arrival (DOA) estimation using sensor array superresolution techniques are known to suffer from array modeling errors including array element displacements, mutual co...