96 search results - page 11 / 20 » An Isolation Scheduling Model for Multicores |
ECOWS
2007
Springer
15 years 4 months ago
2007
Springer
For improved flexibility and concurrent usage existing transaction management models for Web services relax the isolation property of Web service-based transactions. Correctness o...
136
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TCAD
2010
14 years 5 months ago
2010
For real-time applications, it is necessary to estimate the worst-case performance early in the design process without actual hardware implementation. While the non-preemptive task...
123
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ISPASS
2009
IEEE
15 years 5 months ago
2009
IEEE
Trace-driven simulation of superscalar processors is particularly complicated. The dynamic nature of superscalar processors combined with the static nature of traces can lead to l...
HIPEAC
2010
Springer
15 years 7 months ago
2010
Springer
Abstract. The shared-cache contention on Chip Multiprocessors causes performance degradation to applications and hurts system fairness. Many previously proposed solutions schedule ...
73
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HPCA
2002
IEEE
15 years 10 months ago
2002
IEEE
We propose a low overhead, on-line memory monitoring scheme utilizing a set of novel hardware counters. The counters act like pressure gauges indicating the marginal gain in the n...