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122
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ICCAD
1999
IEEE
97views Hardware» more  ICCAD 1999»
15 years 7 months ago
A methodology for correct-by-construction latency insensitive design
In Deep Sub-Micron (DSM) designs, performance will depend critically on the latency of long wires. We propose a new synthesis methodology for synchronous systems that makes the de...
Luca P. Carloni, Kenneth L. McMillan, Alexander Sa...
126
Voted
ICCD
1999
IEEE
110views Hardware» more  ICCD 1999»
15 years 7 months ago
TriMedia CPU64 Architecture
We present a new VLIW core as a successor to the TriMedia TM1000. The processor is targeted for embedded use in media-processing devices like DTVs and set-top boxes. Intended as a...
Jos T. J. van Eijndhoven, Kees A. Vissers, Evert-J...
135
Voted
ICEIS
1999
IEEE
15 years 7 months ago
Contour Estimation on Piecewise Homogeneous Random Fields
: Contour Estimation, Bayesian Estimation, Random Fields, Dynamic Programming, Multigrid Methods. This paper addresses contour estimation on images modeled as piecewise homogeneous...
José A. Moinhos Cordeiro, José M. B....
160
Voted
ICNP
1999
IEEE
15 years 7 months ago
Scaling End-to-End Multicast Transports with a Topologically-Sensitive Group Formation Protocol
While the IP unicast service has proven successful, extending end-to-end adaptation to multicast has been a difficult problem. Unlike the unicast case, multicast protocols must su...
Sylvia Ratnasamy, Steven McCanne
137
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ICPP
1999
IEEE
15 years 7 months ago
SLC: Symbolic Scheduling for Executing Parameterized Task Graphs on Multiprocessors
Task graph scheduling has been found effective in performance prediction and optimization of parallel applications. A number of static scheduling algorithms have been proposed for...
Michel Cosnard, Emmanuel Jeannot, Tao Yang
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