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ICCAD
2006
IEEE
122views Hardware» more  ICCAD 2006»
15 years 8 months ago
Fill for shallow trench isolation CMP
Shallow trench isolation (STI) is the mainstream CMOS isolation technology. It uses chemical mechanical planarization (CMP) to remove excess of deposited oxide and attain a planar...
Andrew B. Kahng, Puneet Sharma, Alexander Zelikovs...
ICCAD
2006
IEEE
131views Hardware» more  ICCAD 2006»
15 years 8 months ago
High-level synthesis challenges and solutions for a dynamically reconfigurable processor
A dynamically reconfigurable processor (DRP) is designed to achieve high area efficiency by switching reconfigurable data paths dynamically. Our DRP architecture has a stand alone...
Takao Toi, Noritsugu Nakamura, Yoshinosuke Kato, T...
CVPR
2009
IEEE
15 years 6 months ago
Contextual decomposition of multi-label images
Most research on image decomposition, e.g. image segmentation and image parsing, has predominantly focused on the low-level visual clues within single image and neglected the cont...
Teng Li, Tao Mei, Shuicheng Yan, In-So Kweon, Chil...
ICS
2009
Tsinghua U.
15 years 6 months ago
High-performance regular expression scanning on the Cell/B.E. processor
Matching regular expressions (regexps) is a very common workload. For example, tokenization, which consists of recognizing words or keywords in a character stream, appears in ever...
Daniele Paolo Scarpazza, Gregory F. Russell
CISS
2008
IEEE
15 years 6 months ago
Reconstruction of compressively sensed images via neurally plausible local competitive algorithms
Abstract—We develop neurally plausible local competitive algorithms (LCAs) for reconstructing compressively sensed images. Reconstruction requires solving a sparse approximation ...
Robert L. Ortman, Christopher J. Rozell, Don H. Jo...
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