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73
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ISPD
2004
ACM
171views Hardware» more  ISPD 2004»
15 years 3 months ago
Structured ASIC, evolution or revolution?
This paper describes the structured ASIC technology and impacts to the implementation flow. With an optimized and programmable structure, the structured ASIC technology indeed int...
Kun-Cheng Wu, Yu-Wen Tsai
80
Voted
BMCBI
2010
97views more  BMCBI 2010»
14 years 9 months ago
Biomarker discovery in heterogeneous tissue samples -taking the in-silico deconfounding approach
Background: For heterogeneous tissues, such as blood, measurements of gene expression are confounded by relative proportions of cell types involved. Conclusions have to rely on es...
Dirk Repsilber, Sabine Kern, Anna Telaar, Gerhard ...
69
Voted
DSN
2009
IEEE
15 years 4 months ago
Maximizing system lifetime by battery scheduling
The use of mobile devices is limited by the battery lifetime. Some devices have the option to connect an extra battery, or to use smart battery-packs with multiple cells to extend...
Marijn R. Jongerden, Boudewijn R. Haverkort, Henri...
ICCAD
2007
IEEE
111views Hardware» more  ICCAD 2007»
15 years 6 months ago
Exploiting STI stress for performance
— Starting at the 65nm node, stress engineering to improve performance of transistors has been a major industry focus. An intrinsic stress source – shallow trench isolation –...
Andrew B. Kahng, Puneet Sharma, Rasit Onur Topalog...
81
Voted
ICCAD
2003
IEEE
138views Hardware» more  ICCAD 2003»
15 years 6 months ago
Multi-Million Gate FPGA Physical Design Challenges
The recent past has seen a tremendous increase in the size of design circuits that can be implemented in a single FPGA. These large design sizes significantly impact cycle time du...
Maogang Wang, Abhishek Ranjan, Salil Raje