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IPPS
2006
IEEE
15 years 4 months ago
Elementary block based 2-dimensional dynamic and partial reconfiguration for Virtex-II FPGAs
The development of Field Programmable Gate Arrays (FPGAs) had tremendous improvements in the last few years. They were extended from simple logic circuits to complex Systems-on-Ch...
Michael Hübner, Christian Schuck, Jürgen...
ISCA
2006
IEEE
151views Hardware» more  ISCA 2006»
15 years 4 months ago
The BlackWidow High-Radix Clos Network
This paper describes the radix-64 folded-Clos network of the Cray BlackWidow scalable vector multiprocessor. We describe the BlackWidow network which scales to 32K processors with...
Steve Scott, Dennis Abts, John Kim, William J. Dal...
NIME
2005
Springer
164views Music» more  NIME 2005»
15 years 3 months ago
Wireless Dance Control: PAIR and WISEAR
WISEAR (Wireless Sensor Array) is a Linux based Embeddedx86 TS- 5600 SBC (Single Board Computer) specifically configured for use with music, dance and video performance technologi...
Peter Swendsen, David Topper
CIBCB
2007
IEEE
15 years 1 months ago
Associative Artificial Neural Network for Discovery of Highly Correlated Gene Groups Based on Gene Ontology and Gene Expression
Abstract-- The advance of high-throughput experimental technologies poses continuous challenges to computational data analysis in functional and comparative genomics studies. Gene ...
Ji He, Xinbin Dai, Xuechun Zhao
CLEIEJ
2008
82views more  CLEIEJ 2008»
14 years 10 months ago
Postal Envelope Segmentation using Learning-Based Approach
This paper presents a learning-based approach to segment postal address blocks where the learning step uses only one pair of images (a sample image and its ideal segmented solutio...
Horacio Andrés Legal-Ayala, Jacques Facon, ...