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AHS
2007
IEEE
231views Hardware» more  AHS 2007»
15 years 4 months ago
Debug Support for Hybrid SoCs
System-on-Chip devices containing both conventional and reconfigurable circuits are increasing in popularity. However the on-chip debug support infrastructure required to aid syst...
Andrew B. T. Hopkins, Klaus D. McDonald-Maier
ISVLSI
2006
IEEE
126views VLSI» more  ISVLSI 2006»
15 years 4 months ago
QUKU: A Two-Level Reconfigurable Architecture
FPGAs have been used for prototyping of ASICs, for low-volume ASIC replacement and for systems requiring in-field hardware upgrades. However, the potential to use dynamic reconfig...
Sunil Shukla, Neil W. Bergmann, Jürgen Becker
FPL
2004
Springer
113views Hardware» more  FPL 2004»
15 years 3 months ago
An Evolvable Hardware Tutorial
Abstract. Evolvable Hardware (EHW) is a scheme - inspired by natural evolution, for automatic design of hardware systems. By exploring a large design search space, EHW may find so...
Jim Torresen
MM
1999
ACM
143views Multimedia» more  MM 1999»
15 years 2 months ago
DTV: a client-based interactive DTV architecture
In this study we present a client-based architecture that supports time-shift Digital-TV (DTV) features (i.e., pause, replay and fast-forward) and interactive applications. We cal...
Edward Y. Chang
EH
1999
IEEE
122views Hardware» more  EH 1999»
15 years 2 months ago
The MorphoSys Dynamically Reconfigurable System-on-Chip
MorphoSys is a system-on-chip which combines a RISC processor with an array of reconfigurable cells. The important features of MorphoSys are coarse-grain granularity, dynamic reco...
Guangming Lu, Hartej Singh, Ming-Hau Lee, Nader Ba...