Sciweavers

220 search results - page 37 / 44
» An adaptive packed-memory array
Sort
View
DFT
2004
IEEE
90views VLSI» more  DFT 2004»
15 years 1 months ago
An XOR Based Reed-Solomon Algorithm for Advanced RAID Systems
In this paper, a simple codec algorithm based on Reed-Solomon (RS) codes is proposed for erasure correcting in RAID (Redundant Array of Independent Disks) level 6 systems. Unlike ...
Ping-Hsun Hsieh, Ing-Yi Chen, Yu-Ting Lin, Sy-Yen ...
FPGA
1995
ACM
149views FPGA» more  FPGA 1995»
15 years 1 months ago
PathFinder: A Negotiation-based Performance-driven Router for FPGAs
Routing FPGAs is a challenging problem because of the relative scarcity of routing resources, both wires and connection points. This can lead either to slow implementations caused...
Larry McMurchie, Carl Ebeling
CF
2005
ACM
14 years 12 months ago
SPANIDS: a scalable network intrusion detection loadbalancer
Network intrusion detection systems (NIDS) are becoming an increasingly important security measure. With rapidly increasing network speeds, the capacity of the NIDS sensor can lim...
Lambert Schaelicke, Kyle Wheeler, Curt Freeland
EVOW
2008
Springer
14 years 11 months ago
Analogue Circuit Control through Gene Expression
Abstract. Software configurable analogue arrays offer an intriguing platform for automated design by evolutionary algorithms. Like previous evolvable hardware experiments, these pl...
Kester Clegg, Susan Stepney
FPL
2008
Springer
110views Hardware» more  FPL 2008»
14 years 11 months ago
Automatic generation of run-time parameterizable configurations
In many applications, subsequent data manipulations differ only in a small set of parameter values. Because of their reconfigurability, FPGAs (Field Programmable Gate Arrays) can ...
Karel Bruneel, Dirk Stroobandt