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VLSID
2007
IEEE
133views VLSI» more  VLSID 2007»
15 years 10 months ago
On the Impact of Address Space Assignment on Performance in Systems-on-Chip
Today, VLSI systems for computationally demanding applications are being built as Systems-on-Chip (SoCs) with a distributed memory sub-system which is shared by a large number of ...
G. Hazari, Madhav P. Desai, H. Kasture
ISCAS
1994
IEEE
138views Hardware» more  ISCAS 1994»
15 years 1 months ago
High-Throughput Data Compressor Designs Using Content Addressable Memory
This paper presents a novel VLSI architecture for high-speed data compressor designs which implement the well-known LZ77 algorithm. The architecture mainly consists of three units...
Ren-Yang Yang, Chen-Yi Lee
87
Voted
VLSID
2002
IEEE
138views VLSI» more  VLSID 2002»
15 years 10 months ago
ETAM++: Extended Transition Activity Measure for Low Power Address Bus Designs
Interconnection networks in Systems-On-Chip begin to have a non-negligible impact on the power consumption of a whole system. This is because of increasing inter-wire capacitances...
Haris Lekatsas, Jörg Henkel
77
Voted
ISCAS
2008
IEEE
136views Hardware» more  ISCAS 2008»
15 years 4 months ago
"Green" micro-architecture and circuit co-design for ternary content addressable memory
—In this paper, an energy-efficient and high performance ternary content addressable memory (TCAM) are presented. It employs the concept of “green” microarchitecture and circ...
Po-Tsang Huang, Shu-Wei Chang, Wen-Yen Liu, Wei Hw...
IWCMC
2006
ACM
15 years 3 months ago
Performance of Taroko: a cluster-based addressing and routing scheme for self-organized networks
Self-Organized Networks (SONs) are a general description of autonomous networks without infrastructure, of which Ad Hoc, Sensor and Mesh networks are special cases. We had previou...
Julien Ridoux, Meriem Kassar, Mathias Boc, Anne Fl...