Sciweavers

3156 search results - page 75 / 632
» An address translation simulator
Sort
View
ICPP
2005
IEEE
15 years 7 months ago
Exploring Processor Design Options for Java-Based Middleware
Java-based middleware is a rapidly growing workload for high-end server processors, particularly Chip Multiprocessors (CMP). To help architects design future microprocessors to ru...
Martin Karlsson, Erik Hagersten, Kevin E. Moore, D...
HPCA
2008
IEEE
16 years 1 months ago
Performance and power optimization through data compression in Network-on-Chip architectures
The trend towards integrating multiple cores on the same die has accentuated the need for larger on-chip caches. Such large caches are constructed as a multitude of smaller cache ...
Reetuparna Das, Asit K. Mishra, Chrysostomos Nicop...
FCCM
2008
IEEE
212views VLSI» more  FCCM 2008»
15 years 8 months ago
Map-reduce as a Programming Model for Custom Computing Machines
The map-reduce model requires users to express their problem in terms of a map function that processes single records in a stream, and a reduce function that merges all mapped out...
Jackson H. C. Yeung, C. C. Tsang, Kuen Hung Tsoi, ...
90
Voted
BMCBI
2010
98views more  BMCBI 2010»
15 years 1 months ago
A semi-nonparametric mixture model for selecting functionally consistent proteins
Background: High-throughput technologies have led to a new era of proteomics. Although protein microarray experiments are becoming more common place there are a variety of experim...
Lianbo Yu, R. W. Doerge
MR
2007
173views Robotics» more  MR 2007»
15 years 1 months ago
A maintenance planning and business case development model for the application of prognostics and health management (PHM) to ele
- This paper presents a model that enables the optimal interpretation of Prognostics and Health Management (PHM) results for electronic systems. In this context, optimal interpreta...
Peter A. Sandborn, Chris Wilkinson