79 search results - page 7 / 16 » An adjoint method for second-order switching time optimizati... |
75
Voted
DAC
2006
ACM
16 years 18 days ago
2006
ACM
Design space exploration during high level synthesis is often conducted through ad-hoc probing of the solution space using some scheduling algorithm. This is not only time consumi...
DATE
2010
IEEE
14 years 10 months ago
2010
IEEE
Abstract—On-chip interconnection network is a crucial design component in high-performance System-on-Chips (SoCs). Many of previous works have focused on the automation of its to...
125
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MP
2002
14 years 11 months ago
2002
We introduce an alternative to the smoothing technique approach for constrained optimization. As it turns out for any given smoothing function there exists a modification with part...
83
Voted
ICCD
2000
IEEE
15 years 8 months ago
2000
IEEE
This paper is concerned with the analysis and optimization of the ground bounce in digital CMOS circuits. First, an analytical method for calculating of the ground bounce is presen...
COMCOM
2004
14 years 11 months ago
2004
The Private Network-to-Network Interface (PNNI) is a scalable hierarchical protocol that allows ATM switches to be aggregated into clusters called peer groups. To provide good acc...