Sciweavers

6906 search results - page 1062 / 1382
» An algorithm for modelling key terms
Sort
View
DAC
2008
ACM
16 years 7 months ago
Automated transistor sizing for FPGA architecture exploration
The creation of an FPGA requires extensive transistor-level design. This is necessary for both the final design, and during architecture exploration, when many different logic and...
Ian Kuon, Jonathan Rose
DAC
2008
ACM
16 years 7 months ago
Optimizing automatic abstraction refinement for generalized symbolic trajectory evaluation
ng Automatic Abstraction Refinement for Generalized Symbolic Trajectory Evaluation Yan Chen Dept. of Computer Science Portland State University Portland, OR, 97207 chenyan@cs.pdx.e...
Yan Chen, Fei Xie, Jin Yang
DAC
2004
ACM
16 years 7 months ago
Automated fixed-point data-type optimization tool for signal processing and communication systems
A tool that automates the floating-point to fixed-point conversion (FFC) process for digital signal processing systems is described. The tool automatically optimizes fixed-point d...
Changchun Shi, Robert W. Brodersen
DAC
2005
ACM
16 years 7 months ago
Automated nonlinear Macromodelling of output buffers for high-speed digital applications
We present applications of a recently developed automated nonlinear macromodelling approach to the important problem of macromodelling high-speed output buffers/drivers. Good nonl...
Ning Dong, Jaijeet S. Roychowdhury
DAC
2006
ACM
16 years 7 months ago
Architecture-aware FPGA placement using metric embedding
Since performance on FPGAs is dominated by the routing architecture rather than wirelength, we propose a new architecture-aware approach to initial FPGA placement that models the ...
Padmini Gopalakrishnan, Xin Li, Lawrence T. Pilegg...
« Prev « First page 1062 / 1382 Last » Next »