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ISCA
2000
IEEE
107views Hardware» more  ISCA 2000»
15 years 2 months ago
A fully associative software-managed cache design
As DRAM access latencies approach a thousand instructionexecution times and on-chip caches grow to multiple megabytes, it is not clear that conventional cache structures continue ...
Erik G. Hallnor, Steven K. Reinhardt
DCOSS
2006
Springer
15 years 1 months ago
Lifetime Maximization of Sensor Networks Under Connectivity and k-Coverage Constraints
In this paper, we study the fundamental limits of a wireless sensor network's lifetime under connectivity and k-coverage constraints. We consider a wireless sensor network wit...
Wei Mo, Daji Qiao, Zhengdao Wang
ASIACRYPT
2003
Springer
15 years 1 months ago
Universal Designated-Verifier Signatures
Motivated by privacy issues associated with dissemination of signed digital certificates, we define a new type of signature scheme called a `Universal Designated-Verifier Signatur...
Ron Steinfeld, Laurence Bull, Huaxiong Wang, Josef...
CP
2008
Springer
14 years 11 months ago
An Application of Constraint Programming to Superblock Instruction Scheduling
Modern computer architectures have complex features that can only be fully taken advantage of if the compiler schedules the compiled code. A standard region of code for scheduling ...
Abid M. Malik, Michael Chase, Tyrel Russell, Peter...
ECIR
2007
Springer
14 years 11 months ago
Combining Evidence for Relevance Criteria: A Framework and Experiments in Web Retrieval
Abstract. We present a framework that assesses relevance with respect to several relevance criteria, by combining the query-dependent and query-independent evidence indicating thes...
Theodora Tsikrika, Mounia Lalmas
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