Sciweavers

12 search results - page 3 / 3
» An almost non-blocking stack
Sort
View
ISCA
2008
IEEE
188views Hardware» more  ISCA 2008»
14 years 20 days ago
MIRA: A Multi-layered On-Chip Interconnect Router Architecture
Recently, Network-on-Chip (NoC) architectures have gained popularity to address the interconnect delay problem for designing CMP / multi-core / SoC systems in deep sub-micron tech...
Dongkook Park, Soumya Eachempati, Reetuparna Das, ...
MICRO
2008
IEEE
114views Hardware» more  MICRO 2008»
14 years 20 days ago
Toward a multicore architecture for real-time ray-tracing
Significant improvement to visual quality for real-time 3D graphics requires modeling of complex illumination effects like soft-shadows, reflections, and diffuse lighting intera...
Venkatraman Govindaraju, Peter Djeu, Karthikeyan S...