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ACSC
2005
IEEE
15 years 3 months ago
Interprocedural Side-Effect Analysis and Optimisation in the Presence of Dynamic Class Loading
We introduce a new approach to computing interprocedural modification side effects for Java programs in the presence of dynamic class loading. When compile-time unknown classes c...
Phung Hua Nguyen, Jingling Xue
DATE
2005
IEEE
139views Hardware» more  DATE 2005»
15 years 3 months ago
Statistical Timing Analysis with Extended Pseudo-Canonical Timing Model
— State of the art statistical timing analysis (STA) tools often yield less accurate results when timing variables become correlated due to global source of variations and path r...
Lizheng Zhang, Weijen Chen, Yuhen Hu, Charlie Chun...
ICCAD
2003
IEEE
205views Hardware» more  ICCAD 2003»
15 years 3 months ago
Statistical Timing Analysis for Intra-Die Process Variations with Spatial Correlations
Process variations have become a critical issue in performance verification of high-performance designs. We present a new, statistical timing analysis method that accounts for int...
Aseem Agarwal, David Blaauw, Vladimir Zolotov
ISSS
2002
IEEE
124views Hardware» more  ISSS 2002»
15 years 2 months ago
Timing Analysis of Embedded Software for Speculative Processors
Static timing analysis of embedded software is important for systems with hard real-time constraints. To accurately estimate time bounds, it is essential to model the underlying m...
Abhik Roychoudhury, Xianfeng Li, Tulika Mitra
SIGMETRICS
1992
ACM
145views Hardware» more  SIGMETRICS 1992»
15 years 1 months ago
Analysis of the Generalized Clock Buffer Replacement Scheme for Database Transaction Processing
The CLOCK algorithm is a popular buffer replacement algorithm becauseof its simplicity and its ability to approximate the performance of the Least Recently Used (LRU) replacement ...
Victor F. Nicola, Asit Dan, Daniel M. Dias