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CHARME
2005
Springer
176views Hardware» more  CHARME 2005»
15 years 3 months ago
An Analysis of SAT-Based Model Checking Techniques in an Industrial Environment
Abstract. Model checking is a formal technique for automatically verifying that a finite-state model satisfies a temporal property. In model checking, generally Binary Decision D...
Nina Amla, Xiaoqun Du, Andreas Kuehlmann, Robert P...
ISCA
2000
IEEE
91views Hardware» more  ISCA 2000»
15 years 2 months ago
Performance analysis of the Alpha 21264-based Compaq ES40 system
This paper evaluates performance characteristics of the Compaq ES40 shared memory multiprocessor. The ES40 system contains up to four Alpha 21264 CPU’s together with a high-perf...
Zarka Cvetanovic, Richard E. Kessler
DAC
1997
ACM
15 years 2 months ago
Analysis and Evaluation of Address Arithmetic Capabilities in Custom DSP Architectures
—Many application-specific architectures provide indirect addressing modes with auto-increment/decrement arithmetic. Since these architectures generally do not feature an indexe...
Ashok Sudarsanam, Stan Y. Liao, Srinivas Devadas
FLAIRS
2008
15 years 7 days ago
Complementary Analysis of High-Order Association Patterns and Classification
To facilitate more meaningful interpretation considering the internal interdependency relationships between data values, a new form of high-order (multiple-valued) pattern known a...
Thomas W. H. Lui, David K. Y. Chiu
GLVLSI
2010
IEEE
149views VLSI» more  GLVLSI 2010»
14 years 12 months ago
Lightweight runtime control flow analysis for adaptive loop caching
Loop caches provide an effective method for decreasing memory hierarchy energy consumption by storing frequently executed code in a more energy efficient structure than the level ...
Marisha Rawlins, Ann Gordon-Ross