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ICPPW
2002
IEEE
13 years 11 months ago
Near-Optimal Loop Tiling by Means of Cache Miss Equations and Genetic Algorithms
The effectiveness of the memory hierarchy is critical for the performance of current processors. The performance of the memory hierarchy can be improved by means of program transf...
Jaume Abella, Antonio González, Josep Llosa...
HPCA
1998
IEEE
13 years 10 months ago
The Effectiveness of SRAM Network Caches in Clustered DSMs
The frequency of accesses to remote data is a key factor affecting the performance of all Distributed Shared Memory (DSM) systems. Remote data caching is one of the most effective...
Adrian Moga, Michel Dubois
ISCA
2006
IEEE
187views Hardware» more  ISCA 2006»
14 years 8 days ago
A Case for MLP-Aware Cache Replacement
Performance loss due to long-latency memory accesses can be reduced by servicing multiple memory accesses concurrently. The notion of generating and servicing long-latency cache m...
Moinuddin K. Qureshi, Daniel N. Lynch, Onur Mutlu,...
WMPI
2004
ACM
13 years 11 months ago
Cache organizations for clustered microarchitectures
Clustered microarchitectures are an effective organization to deal with the problem of wire delays and complexity by partitioning some of the processor resources. The organization ...
José González, Fernando Latorre, Ant...
LCTRTS
2010
Springer
13 years 8 months ago
Resilience analysis: tightening the CRPD bound for set-associative caches
In preemptive real-time systems, scheduling analyses need—in addition to the worst-case execution time—the context-switch cost. In case of preemption, the preempted and the pr...
Sebastian Altmeyer, Claire Maiza, Jan Reineke