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VLSID
2003
IEEE
147views VLSI» more  VLSID 2003»
15 years 10 months ago
SoC Synthesis with Automatic Hardware Software Interface Generation
Design of efficient System-on-Chips (SoCs) require thorough application analysis to identify various compute intensive parts. These compute intensive parts can be mapped to hardwa...
Amarjeet Singh 0002, Amit Chhabra, Anup Gangwar, B...
MICRO
2005
IEEE
130views Hardware» more  MICRO 2005»
15 years 3 months ago
Exploiting Vector Parallelism in Software Pipelined Loops
An emerging trend in processor design is the addition of short vector instructions to general-purpose and embedded ISAs. Frequently, these extensions are employed using traditiona...
Samuel Larsen, Rodric M. Rabbah, Saman P. Amarasin...
DDECS
2007
IEEE
201views Hardware» more  DDECS 2007»
15 years 4 months ago
Built in Defect Prognosis for Embedded Memories
: As scan compression replaces the traditional scan it is important to understand how it works with power. DFT MAX represents one of the two primary scan compression solutions used...
Prashant Dubey, Akhil Garg, Sravan Kumar Bhaskaran...
CGF
1998
86views more  CGF 1998»
14 years 9 months ago
Subdivision Schemes for Thin Plate Splines
Thin plate splines are a well known entity of geometric design. They are defined as the minimizer of a variational problem whose differential operators approximate a simple notio...
Henrik Weimer, Joe D. Warren
MOBIHOC
2008
ACM
15 years 9 months ago
Strong barrier coverage of wireless sensor networks
Constructing sensor barriers to detect intruders crossing a randomly-deployed sensor network is an important problem. Early results have shown how to construct sensor barriers to ...
Benyuan Liu, Olivier Dousse, Jie Wang, Anwar Saipu...