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» An approach for federating parallel simulators
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IEEEPACT
2009
IEEE
14 years 7 months ago
FASTM: A Log-based Hardware Transactional Memory with Fast Abort Recovery
Abstract--Version management, one of the key design dimensions of Hardware Transactional Memory (HTM) systems, defines where and how transactional modifications are stored. Current...
Marc Lupon, Grigorios Magklis, Antonio Gonzá...
ISCAPDCS
2004
14 years 11 months ago
The Fat-Stack and Universal Routing in Interconnection Networks
This paper shows that a novel network called the fat-stack is universally efficient when adequate capacity distribution is provided and is suitable for use as an interconnection n...
Kevin F. Chen, Edwin Hsing-Mean Sha
82
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HPCA
2005
IEEE
15 years 10 months ago
Improving Multiple-CMP Systems Using Token Coherence
Improvements in semiconductor technology now enable Chip Multiprocessors (CMPs). As many future computer systems will use one or more CMPs and support shared memory, such systems ...
Michael R. Marty, Jesse D. Bingham, Mark D. Hill, ...
MICRO
2003
IEEE
109views Hardware» more  MICRO 2003»
15 years 2 months ago
TLC: Transmission Line Caches
It is widely accepted that the disproportionate scaling of transistor and conventional on-chip interconnect performance presents a major barrier to future high performance systems...
Bradford M. Beckmann, David A. Wood
IPSN
2003
Springer
15 years 2 months ago
A Robust Data Delivery Protocol for Large Scale Sensor Networks
Although data forwarding algorithms and protocols have been among the first set of issues explored in sensor networking, how to reliably deliver sensing data through a vast field...
Fan Ye, Gary Zhong, Songwu Lu, Lixia Zhang