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DSD
2009
IEEE
124views Hardware» more  DSD 2009»
15 years 4 months ago
Network-on-Chip Architecture Exploration Framework
— In this paper, we present a novel framework for the automated generation of Network-on-Chips (NoC) architectures, that enables architecture exploration and optimization. The au...
Timo Schönwald, Jochen Zimmermann, Oliver Bri...
MVA
2000
203views Computer Vision» more  MVA 2000»
14 years 11 months ago
An Environment to Test Progressive Refinement of Indexing for Content-Based Image Retrieval
Content-based image retrieval is a fairly new discipline. Yet research in this field has highlighted many approaches that show good performance in specific subproblems using singl...
Maria Grazia Albanesi, Marco Ferretti, Alessandro ...
JACM
2010
137views more  JACM 2010»
14 years 8 months ago
Reconciling description logics and rules
Description logics (DLs) and rules are formalisms that emphasize different aspects of knowledge representation: whereas DLs are focused on specifying and reasoning about conceptual...
Boris Motik, Riccardo Rosati
MKWI
2008
142views Business» more  MKWI 2008»
14 years 11 months ago
A Decentralized and Ontology-Based Approach to Infrastructure Monitoring
: We introduce infrastructure monitoring as an application domain that demands decentralized system designs. This is motivated by the large scale of these systems, the heterogeneit...
Florian Fuchs, Michael Berger
RTAS
1997
IEEE
15 years 1 months ago
Scalable Hardware Priority Queue Architectures for High-Speed Packet Switches
ÐWith effective packet-scheduling mechanisms, modern integrated networks can support the diverse quality-of-service requirements of emerging applications. However, arbitrating bet...
Sung-Whan Moon, Kang G. Shin, Jennifer Rexford