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LFCS
2007
Springer
15 years 9 months ago
Model Checking Knowledge and Linear Time: PSPACE Cases
We present a general algorithm scheme for model checking logics of knowledge, common knowledge and linear time, based on simulations to a class of structures that capture the way t...
Kai Engelhardt, Peter Gammie, Ron van der Meyden
123
Voted
ATVA
2007
Springer
150views Hardware» more  ATVA 2007»
15 years 7 months ago
3-Valued Circuit SAT for STE with Automatic Refinement
Abstract. Symbolic Trajectory Evaluation (STE) is a powerful technique for hardware model checking. It is based on a 3-valued symbolic simulation, using 0,1 and X n"), where t...
Orna Grumberg, Assaf Schuster, Avi Yadgar
155
Voted
CIKM
2010
Springer
15 years 1 months ago
Regularization and feature selection for networked features
In the standard formalization of supervised learning problems, a datum is represented as a vector of features without prior knowledge about relationships among features. However, ...
Hongliang Fei, Brian Quanz, Jun Huan
148
Voted
TON
2008
125views more  TON 2008»
15 years 3 months ago
Two techniques for fast computation of constrained shortest paths
Abstract-- Computing constrained shortest paths is fundamental to some important network functions such as QoS routing, which is to find the cheapest path that satisfies certain co...
Shigang Chen, Meongchul Song, Sartaj Sahni
148
Voted
GLVLSI
2009
IEEE
142views VLSI» more  GLVLSI 2009»
15 years 7 months ago
Design tools for emerging technologies
The rapidly expanding diversity of technology available at the nanoscale is disrupting the existing transistorcentric microelectronics design paradigm, resulting in nearly decade-l...
Jacob White