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» An efficient verification algorithm for parallel controllers
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POPL
2010
ACM
15 years 7 months ago
A simple, verified validator for software pipelining
Software pipelining is a loop optimization that overlaps the execution of several iterations of a loop to expose more instruction-level parallelism. It can result in first-class p...
Jean-Baptiste Tristan, Xavier Leroy
CONCUR
2010
Springer
14 years 10 months ago
Buffered Communication Analysis in Distributed Multiparty Sessions
Many communication-centred systems today rely on asynchronous messaging among distributed peers to make efficient use of parallel execution and resource access. With such asynchron...
Pierre-Malo Deniélou, Nobuko Yoshida
DAGSTUHL
1990
14 years 10 months ago
Parallel Rule-Firing Production Systems
One of the principal advantages of parallelizing a rule-based system, or more generally, any A.I. system, is the ability to pursue alternate search paths concurrently. Conventiona...
Daniel Neimann
ISPAN
2000
IEEE
15 years 2 months ago
Versatile Processor Design for Efficiency and High Performance
We present new architectural concepts for uniprocessor designs that conform to the data-driven computation paradigm. Usage of our D2 -CPU (Data-Driven processor) follows the natura...
Sotirios G. Ziavras
POPL
2009
ACM
15 years 10 months ago
The theory of deadlock avoidance via discrete control
Deadlock in multithreaded programs is an increasingly important problem as ubiquitous multicore architectures force parallelization upon an ever wider range of software. This pape...
Manjunath Kudlur, Scott A. Mahlke, Stéphane...